Speaker: Pratap Narayan Singh

Pratap is a seasoned executive with 18+ years experience in the field of IC design, creator of state of the art designs used in many products (Ex STMicroelectronics, Ex Wolfson) . He has contributed to more than 50 products and 100+ IPs covering different technologies nodes and foundries. He has specialization in RF, system design and architecture. Has received Silver medal from IIT Roorkee along with his bachelor degree. He holds 27+ patents and 10 IEEE publications & is Senior member of IEEE. In his role as Co-Founder and CTO of Vervesemi, he is currently focusing on highly innovative and differentiated, product technology development strategy and implementation. Leading our organisation forward in skills, maturity and scale. Driving the organisation's vision to become leading semiconductor company.

 

Subject: Wide Bandwidth Analog-to-Digital Converter in Samsung LN08LPP with a novel time Interleaving algorithm to achieve performances suitable for 5G applications

(5G尖端之選-搭載全新時序交錯演算法的寬頻類比數位轉換器)

Abstract: Wide bandwidth Analog to Digital converters are key to analog baseband of wireless communication transceivers. There are many time interleaving algorithms already published in literature in past and they have limitations which limit the flexibility on frequency planing of the overall system hence complexity of the system drivers are increased. During this talk these limitations of the most popular algorithms and circuits will discussed in detail. Later part of the talk will be discussing about the 12b 4Gsps time interleaved ADC in Samsung LN08LPP and it's time interleaving architecture to overcome most of the limitations.

 

Target Audience: IC designer, Design services, Analog design, PMIC, AFE