Speaker: Pratap Narayan Singh

Pratap is a seasoned executive with 18+ years experience in the field of IC design, creator of state of the art designs used in many products (Ex STMicroelectronics, Ex Wolfson) .
He has contributed to more than 50 products and 100+ IPs covering different technologies nodes and foundries.
He has specialization in RF, system design and architecture. Has received Silver medal from IIT Roorkee along with his bachelor degree.
He holds 27+ patents and 10 IEEE publications & is Senior member of IEEE. In his role as Co-Founder and CTO of Vervesemi, he is currently focusing on highly innovative and differentiated, product technology development strategy and implementation. Leading our organisation forward in skills, maturity and scale. Driving the organisation's vision to become leading semiconductor company.

 

Subject: Maximizing Performance: Unveiling the Secrets to Signal Chain Optimization for Seamless Sensor Integration

Abstract: 
探討如何通過最佳化信號鏈，揭示信號鏈優化的技巧和方法，從而實現感應器在系統中性能的最大化，並確保其與其他元件無縫整合。

Subject: Enhancing Signal Chain Performance through Advanced Calibration Techniques

Abstract: 
將一系列連接在一起的訊號處理和傳輸元件所建構成的信號鏈，使用先進的校準技術可以幫助調整和優化這些元件，以提高整個信號鏈的性能，進而改善系統的效能和品質。

Target Audience: IC designer, Design services, Analog design, PMIC, AFE